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Compiler construction : 10th International Conference, CC 2001, held as part of the Joint European Conferences | CC 2001 (2001 : Genoa, Italy), Wilhelm, R. (Reinhard), 1946-, ETAPS 2001 (2001 : Genoa, Italy)

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Compiler construction : 10th International Conference, CC 2001, held as part of the Joint European Conferences

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Author: CC 2001 (2001 : Genoa, Italy), Wilhelm, R. (Reinhard), 1946-, ETAPS 2001 (2001 : Genoa, Italy)

Added by: sketch

Added Date: 2015-12-30

Publication Date: 2001

Language: eng

Subjects: Compilers (Computer programs)

Publishers: New York : Springer

Collections: folkscanomy miscellaneous, folkscanomy, additional collections

ISBN Number: 354041861X

Pages Count: 300

PPI Count: 300

PDF Count: 1

Total Size: 184.08 MB

PDF Size: 4.38 MB

Extensions: djvu, gif, pdf, gz, zip, torrent, log, mrc

Edition: [Elektronische Ressource]

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Downloads: 573

Views: 623

Total Files: 18

Media Type: texts

Description

Compiler Construction: 10th International Conference, CC 2001 Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2001 Genova, Italy, April 2–6, 2001 Proceedings
Author: Reinhard Wilhelm
Published by Springer Berlin Heidelberg
ISBN: 978-3-540-41861-0
DOI: 10.1007/3-540-45306-7

Table of Contents:

  • Virtual Classes and Their Implementation
  • Alias Analysis by Means of a Model Checker
  • Points-to and Side-Effect Analyses for Programs Built with Precompiled Libraries
  • A Novel Probabilistic Data Flow Framework
  • Imperative Program Transformation by Rewriting
  • Compiler Transformation of Pointers to Explicit Array Accesses in DSP Applications
  • User-Extensible Simplification—Type-Based Optimizer Generators
  • A Practical, Robust Method for Generating Variable Range Tables
  • Efficient Symbolic Analysis for Optimizing Compilers
  • Interprocedural Shape Analysis for Recursive Programs
  • Design-Driven Compilation
  • Software Pipelining of Nested Loops
  • A First Step Towards Time Optimal Software Pipelining of Loops with Control Flows
  • Comparing Tail Duplication with Compensation Code in Single Path Global Instruction Scheduling
  • Register Saturation in Superscalar and VLIW Codes
  • Directly-Executable Earley Parsing
  • A Bounded Graph-Connect Construction for LR-regular Parsers
  • Array Unification: A Locality Optimization Technique
  • Optimal Live Range Merge for Address Register Allocation in Embedded Programs
  • Speculative Prefetching of Induction Pointers

Includes bibliographical references and index
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